LIGO Document D1500113-v1
- A set of filters to filter the output of the ESD driver. The 10k series current limiting resistor intrinsic to the ESD setup has been subsumed into this design.
Transfer functions are included on the last page of the PDF overview
Bias path has two stage RC filter (pole = 1.6Hz)
Quadrants have single stage pole zero filter (1.6Hz, 53Hz)
DCC Version 3.4.0, contact