customize
Design Rule Verification Report
Date
:
4/16/2008
Time
:
3:23:42 PM
Elapsed Time
:
00:00:00
Filename
:
C:\User\Daniel\Protel\Timing\TimingSlave\DaughterTemplate\DaughterTemplate.PcbDoc
Warnings
:
0
Rule Violations
:
1
Summary
Warnings
Count
Total
0
Rule Violations
Count
Hole Size Constraint (Min=8mil) (Max=150mil) (All)
0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
0
Width Constraint (Min=8mil) (Max=100mil) (Preferred=10mil) (All)
0
Clearance Constraint (Gap=10mil) (All),(All)
0
Broken-Net Constraint ( (All) )
1
Short-Circuit Constraint (Allowed=No) (All),(All)
0
Total
1
Broken-Net Constraint ( (All) )
Net VCCAUX
is broken into 2 sub-nets. Routed To 85.71%
Subnet : P2-73 P2-75
Subnet : C1-1 R1-1 U1-8 U1-7 P1-76 P1-74
Back to top