Altiumcustomize

Design Rule Verification Report

Date : 2/4/2009
Time : 1:03:40 PM
Elapsed Time : 00:00:01
Filename : C:\User\Daniel\Protel\Timing\TimingSlave\ChassisTimingInterface.PcbDoc
Warnings : 3
Rule Violations : 0

Summary

Warnings Count
Split plane(s) intersect Keepout object(s) 3
Total 3

Rule Violations Count
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Broken-Net Constraint ( (All) ) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Hole Size Constraint (Min=1mil) (Max=250mil) (All) 0
Width Constraint (Min=5mil) (Max=100mil) (Preferred=5mil) (All) 0
Clearance Constraint (Gap=5mil) (All),(All) 0
Total 0


Warnings

Split plane(s) intersect Keepout object(s)
GND
VDD
VCCAUX
Back to top