Rule Violations |
Count |
Modified Polygon (Allow modified: No), (Allow shelved: No) |
0 |
Net Antennae (Tolerance=0mil) (All) |
0 |
Silk primitive without silk layer |
0 |
Silk to Silk (Clearance=10mil) (All),(All) |
0 |
Silk To Solder Mask (Clearance=10mil) (IsPad),(All) |
0 |
Minimum Solder Mask Sliver (Gap=10mil) (All),(All) |
0 |
Hole To Hole Clearance (Gap=10mil) (All),(All) |
0 |
Hole Size Constraint (Min=1mil) (Max=230mil) (All) |
0 |
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) |
0 |
Width Constraint (Min=10mil) (Max=25mil) (Preferred=20mil) (All) |
0 |
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) |
0 |
Clearance Constraint (Gap=10mil) (All),(All) |
0 |
Un-Routed Net Constraint ( (All) ) |
0 |
Short-Circuit Constraint (Allowed=No) (All),(All) |
0 |
Room DIFFREC1 (Bounding Region = (1959.402mil, 1138.756mil, 2995.402mil, 2753.756mil) (InComponentClass('DIFFREC1')) |
0 |
Room DIFFREC2 (Bounding Region = (2986mil, 1137mil, 4022mil, 2752mil) (InComponentClass('DIFFREC2')) |
0 |
Room DIFFREC3 (Bounding Region = (4010.402mil, 1139.756mil, 5046.402mil, 2754.756mil) (InComponentClass('DIFFREC3')) |
0 |
Room Squeezer_WhiteningFilter (Bounding Region = (1645mil, 1120mil, 2310mil, 1355mil) (Disabled)(InComponentClass('Squeezer_WhiteningFilter')) |
0 |
Room VoltageReg (Bounding Region = (1810mil, 5377.118mil, 5188mil, 6859mil) (Disabled)(InComponentClass('VoltageReg')) |
0 |
Room WHITENING1 (Bounding Region = (1536.236mil, 2723.118mil, 2744.118mil, 5379.118mil) (Disabled)(InComponentClass('WHITENING1')) |
0 |
Room WHITENING2 (Bounding Region = (2735mil, 2723mil, 3942.882mil, 5379mil) (Disabled)(InComponentClass('WHITENING2')) |
0 |
Room WHITENING3 (Bounding Region = (3935.118mil, 2723.118mil, 5143mil, 5379.118mil) (Disabled)(InComponentClass('WHITENING3')) |
0 |
Total |
0 |